What is the instruction queue in 8086


The internal structure of the microprocessor:



Status flag register:

Carry Flag C (Carry Flag) - If the highest bit of the result creates a carry or borrow, C = 1, otherwise C = 0. To
Overflow Flag O - In an arithmetic operation, the result of a signed number exceeds 8 or 16 bits
The range that the signed number can express, then O = 1, otherwise O = 0. To
8-bit operation (bytes) ---- 128 - +127
16-bit operation (word) - 32768 - +32767
Sign flag S (Sign flag) - The highest bit (D15 or D7) of the result is 1, then S = 1, otherwise S = 0. To
Null Flag Z (Null Flag) - If the result of the operation is 0, then Z = 1, otherwise, Z = 1. To
Parity Flag P (Parity Flag) - If the number “1” in the result is even, P = 1, otherwise P = 0. To
Auxitiary Flag A (Auxitiary Flag) - During byte operation from the low nibble (the third bit) to the high nibble.
If the word operation has a carry or loan from the low byte to the high byte, A = 1, otherwise A = 0.
Direction Flag-D = 1, the address is automatically decremented during the string operation.
D = 0, the address is automatically incremented during the string operation. To
Interrupt-Enable Flag-I = 1, the CPU may receive external interrupt requests,
If I = 0, the external interrupt request is blocked. To

Trace flag - T = 1, which switches processing to single step mode for debugging.


Address adder:


External pin signal:



Addressing mode:


5. Register the relative addressing. 6. Base address plus indexed addressing. 7. Relative base address plus indexed addressing.